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New Palladium II Extends Cadence Acceleration/Emulation Leadership; Cadence Delivers Unparalleled Speed and Capacity to Tackle the Most Complex SoC Verification.

Publication: Business Wire
Publication Date: 25-OCT-04 		Format: Online
Delivery: Immediate Online Access

Article Excerpt
SAN JOSE, Calif. -- Cadence Design Systems, Inc. (NYSE:CDN) (Nasdaq:CDN) today announced its next-generation Incisive(TM) Palladium(R) II acceleration/emulation system that delivers up to twice the speed and capacity of the first-generation Palladium system. Built on the company's innovative processor-based verification technology, the Palladium II system is targeted at designers verifying the most complex system-on-chips (SoCs) in the wireless, networking, computing and multimedia markets. The Palladium II system achieves an industry-first by reaching 256 million-gate capacity and is just one-third the size of the first-generation system.

An integral part of the Cadence Incisive functional verification platform, the Palladium II accelerator/emulator optimizes the system design chain by helping companies get to first software and first silicon with even greater speed and efficiency. Teams can develop and fully verify embedded systems software before receiving first silicon, thereby helping shrink the development cycle...

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